One form of a sampling system consists of a sampling gate followed by a memory storage capacitor and a non-loading voltage follower. This system is very simple, causing the gate to repetitively take samples at one point on an input waveform which will charge the memory capacitor to a voltage equal to that of the input waveform at that point in time. When the sampling point is shifted to a new point on the waveform, the memory capacitor charges to a new voltage. An important characteristic of efficient sampling systems is a quick dot-transient response, which is defined as the ability of a sampling oscilloscope to display correctly any voltage change between any two successive samples. Therefore, the number of samples needed to fully charge the memory capacitor should be as small as possible. To provide the quick response required by this form of sampling system, it is necessary to reduce the size of the memory capacitor. However, for pulse-design circuit reasons, it is very difficult to design sampling gates with a memory capacitor having less than 6 to 20 picofarads of capacitance.
The effective memory capacitance of the sampling gate can be reduced by paralleling the actual positive capacitance with a negative capacitance from the feedback element of a non-loading positive-gain amplifier having a gain greater than unity. Thus the response of the sampling system is made to require a much smaller number of samples than would otherwise be found with that form of gate and is easily controlled by adjustment of the feedback current to the memory capacitor.
It is also difficult to maintain DC stability at low sampling rates in the high-efficiency system just described because of the magnitude of the leakage currents found in high-speed sampling diodes, coupled with the low effective memory capacitance created by the positive feedback in the preamplifier. Such low capacitance with leakage causes vertical movement, known as "slashing," of the dot between samples.